/**
 @file sys_usw_phy.h

 @date 2021-11-19

 @version v2.0

 The file contains all phy related APIs of sys layer
*/

#ifndef _SYS_USW_PORT_API_H
#define _SYS_USW_PORT_API_H
#ifdef __cplusplus
extern "C" {
#endif

/****************************************************************
 *
 * Header Files
 *
 ***************************************************************/
#include "sal.h"
#include "ctc_const.h"
#include "ctc_chip.h"
#include "ctc_debug.h"
#include "sys_usw_port.h"
#include "sys_usw_dmps.h"

/****************************************************************
*
* Defines and Macros
*
****************************************************************/
#define  SYS_GET_LPORT_ID_WITH_CHAN(lchip, rx, chan_id)     sys_usw_port_api_get_lport_with_chan(lchip, rx, chan_id)
#define  SYS_GET_LPORT_ID_WITH_SUBCHAN(lchip, rx, core, pp, dp, sub_chan_id)     sys_usw_port_api_get_lport_with_subchan(lchip, rx, core, pp, dp, sub_chan_id)
#define  SYS_USW_MAX_MISC_CHAN_NUM 8

enum sys_port_api_dmps_property_e
{
    SYS_PORT_API_DMPS_PROP_EN,
    SYS_PORT_API_DMPS_PROP_LINK_UP,
    SYS_PORT_API_DMPS_PROP_TX_IPG,
    SYS_PORT_API_DMPS_PROP_MAC_ID,
    SYS_PORT_API_DMPS_PROP_CHAN_ID,
    SYS_PORT_API_DMPS_PROP_SUB_CHAN_ID,/*DP Channel*/
    SYS_PORT_API_DMPS_PROP_SLICE_ID,
    SYS_PORT_API_DMPS_PROP_SERDES,
    SYS_PORT_API_DMPS_PROP_PORT_TYPE,
    SYS_PORT_API_DMPS_PROP_SPEED_MODE,
    SYS_PORT_API_DMPS_PROP_WLAN_ENABLE,
    SYS_PORT_API_DMPS_PROP_DOT1AE_ENABLE,
    SYS_PORT_API_DMPS_PROP_MAC_STATS_ID,
    SYS_PORT_API_DMPS_PROP_XPIPE_RX,
    SYS_PORT_API_DMPS_PROP_XPIPE_TX,
    SYS_PORT_API_DMPS_PROP_RX_PMAC_SFD_ENABLE,
    SYS_PORT_API_DMPS_PROP_TX_PMAC_SFD_ENABLE,
    SYS_PORT_API_DMPS_PROP_SFD_ENABLE,
    SYS_PORT_API_DMPS_PROP_TX_PRIVATE_INT_EN,
    SYS_PORT_API_DMPS_PROP_TX_CHKSUM_UPD_EN,
    SYS_PORT_API_DMPS_PROP_SERDES_LOGIC,
    SYS_PORT_API_DMPS_PROP_GET_PHY_INST_ID,
    SYS_PORT_API_DMPS_PROP_GET_DP_ASICINST_ID,
    SYS_PORT_API_DMPS_PROP_MAC_ID_P,                    /* used for flexe APS,get protect mac id */
    SYS_PORT_API_DMPS_PROP_PHY_PORT_CHAN_ID,            /* used for bpe module and input port is physical port */
    SYS_PORT_API_DMPS_PROP_PHY_PORT_PMAC_CHAN_ID,       /* only for bpe module and input port is physical port */
    SYS_PORT_API_DMPS_PROP_PHY_PORT_TYPE,               /* only for bpe module */
    SYS_PORT_API_DMPS_PROP_GET_MAC_INDEX,
    SYS_PORT_API_DMPS_PROP_GET_SGMAC_INDEX,
    SYS_PORT_API_DMPS_PROP_GET_PMAC_ID,
    SYS_PORT_API_DMPS_PROP_GET_PMAC_CHAN_ID,
    SYS_PORT_API_DMPS_PROP_PP_ID,
    SYS_PORT_API_DMPS_PROP_DP_ID,
    SYS_PORT_API_DMPS_PROP_SET_PRIORITY,                /* only for AT */
    SYS_PORT_API_DMPS_PROP_GET_IF_TYPE,                 /* only for AT */
    SYS_PORT_API_DMPS_PROP_GET_OH_SYNC,
    SYS_PORT_API_DMPS_PROP_FEC_EN,
    SYS_PORT_API_DMPS_PROP_SPEED_VALUE,
    SYS_PORT_API_DMPS_PROP_MAX
};
typedef enum sys_port_api_dmps_property_e  sys_port_api_dmps_property_t;

struct sys_port_api_misc_chan_info_s
{
    uint8 chan_num;
    uint16 chan_id[SYS_USW_MAX_MISC_CHAN_NUM];
    uint16 speed;
};
typedef struct sys_port_api_misc_chan_info_s sys_port_api_misc_chan_info_t;

struct sys_port_api_serdes_info_s
{
    uint16 serdes_id[8];
    uint8 serdes_mode;
    uint8 serdes_num;
};
typedef struct sys_port_api_serdes_info_s sys_port_api_serdes_info_t;

struct sys_port_info_s
{
    uint16 mac_id;
    uint8 speed_mode;
    uint8 port_type;

    uint16 chan_id;
    uint8  dp_id;
    uint8  pp_id;
    uint16 sub_chan_id;
    uint16 mac_client_id;

    uint16 rx_chan_id;
    uint16 rx_sub_chan_id;
    uint16 rx_mac_client_id;
};
typedef struct sys_port_info_s sys_port_info_t;

struct sys_port_api_dmps_info_s
{
    uint16 mac_id;
    uint16 interface_type;
    uint32 speed_mode    : 8;
    uint32 mac_en        : 1;
    uint32 auto_neg_en   : 1;
    uint32 auto_neg_mode : 3;
    uint32 port_type     : 4;
    uint32 pp_id         : 3;
    uint32 dp_id         : 3;
    uint32 rx_pp_id      : 3;
    uint32 rx_dp_id      : 3;
    uint32 rsv           : 3;

    uint16 chan_id;
    uint16 sub_chan_id;

    uint16 chan_rx_id;
    uint16 rx_sub_chan_id;

    sys_port_api_serdes_info_t serdes_info;
};
typedef struct sys_port_api_dmps_info_s sys_port_api_dmps_info_t;

struct sys_internal_port_info_s
{
    uint16 lport;
    uint16 chan_id;
    uint16 sub_chan_id;
    uint16 dp_mac_client;
    uint8  pp_id;       /* per chip pp_id */
    uint8  dp_id;
    uint8  speed_mode;  /* refer to sys_port_speed_t */
    uint8  port_type;   /* refer to sys_dmps_lport_type_t */
    uint8  is_update;
};
typedef struct sys_internal_port_info_s sys_internal_port_info_t;

struct sys_usw_dmps_port_info_s
{
    uint8  rx;
    uint8  index;
    uint32 gport;
};
typedef struct sys_usw_dmps_port_info_s sys_usw_dmps_port_info_t;

struct sys_port_api_master_s
{
    sal_mutex_t* p_port_mutex;
    sal_task_t*  p_polling_scan;

    sal_task_t*  p_dmps_daemon;
    sal_task_t*  p_dmps_msg_rcv;
    sal_sem_t*   p_dmps_msg_sem;
};
typedef struct sys_port_api_master_s sys_port_api_master_t;

/****************************************************************************
 *
* Global and Declaration
*
*****************************************************************************/


/****************************************************************************
 *
* Function
*
*****************************************************************************/
extern int32
sys_usw_port_api_get_mac_link_up(uint8 lchip, uint32 gport, uint32* p_is_up);

extern int32
sys_usw_port_api_set_port_mac_postfix(uint8 lchip, uint32 gport, ctc_port_mac_postfix_t* p_port_mac);

extern int32
sys_usw_port_api_get_port_mac(uint8 lchip, uint32 gport, mac_addr_t* p_port_mac);

extern int32
sys_usw_port_api_set_phy_if_en(uint8 lchip, uint32 gport, bool enable);

extern int32
sys_usw_port_api_get_phy_if_en(uint8 lchip, uint32 gport, uint16* p_l3if_id, bool* p_enable);

extern int32
sys_usw_port_api_set_sub_if_en(uint8 lchip, uint32 gport, bool enable);

extern int32
sys_usw_port_api_get_sub_if_en(uint8 lchip, uint32 gport, bool* p_enable);

extern int32
sys_usw_port_api_set_vlan_range(uint8 lchip, uint32 gport, ctc_vlan_range_info_t* p_vrange_info, bool enable);

extern int32
sys_usw_port_api_get_vlan_range(uint8 lchip, uint32 gport, ctc_vlan_range_info_t* p_vrange_info, bool* p_enable);

extern int32
sys_usw_port_api_set_loopback(uint8 lchip, ctc_port_lbk_param_t* p_port_lbk);

extern int32
sys_usw_port_api_set_min_frame_size(uint8 lchip, ctc_frame_size_t index, uint16 value);

extern int32
sys_usw_port_api_get_min_frame_size(uint8 lchip, ctc_frame_size_t index, uint16* p_value);

extern int32
sys_usw_port_api_set_max_frame_size(uint8 lchip, ctc_frame_size_t index, uint16 value);

extern int32
sys_usw_port_api_get_max_frame_size(uint8 lchip, ctc_frame_size_t index, uint16* p_value);

extern int32
sys_usw_port_api_set_restriction(uint8 lchip, uint32 gport, ctc_port_restriction_t* p_restriction);

extern int32
sys_usw_port_api_get_restriction(uint8 lchip, uint32 gport, ctc_port_restriction_t* p_restriction);

extern int32
sys_usw_port_api_set_isolation(uint8 lchip, ctc_port_isolation_t* p_port_isolation);

extern int32
sys_usw_port_api_get_isolation(uint8 lchip, ctc_port_isolation_t* p_port_isolation);

extern int32
sys_usw_port_api_set_ipg_size(uint8 lchip, ctc_ipg_size_t index, uint8 size);

extern int32
sys_usw_port_api_get_ipg_size(uint8 lchip, ctc_ipg_size_t index, uint8* p_size);

extern int32
sys_usw_port_api_set_scl_property(uint8 lchip, uint32 gport, ctc_port_scl_property_t* p_prop);

extern int32
sys_usw_port_api_get_scl_property(uint8 lchip, uint32 gport, ctc_port_scl_property_t* p_prop);

extern int32
sys_usw_port_api_set_acl_property(uint8 lchip, uint32 gport, ctc_acl_property_t* p_prop);

extern int32
sys_usw_port_api_get_acl_property(uint8 lchip, uint32 gport, ctc_acl_property_t* p_prop);

extern int32
sys_usw_port_api_set_bpe_property(uint8 lchip, uint32 gport, ctc_port_bpe_property_t * p_prop);

extern int32
sys_usw_port_api_get_bpe_property(uint8 lchip, uint32 gport, ctc_port_bpe_property_t* p_prop);

extern int32
sys_usw_port_api_set_mac_auth(uint8 lchip, uint32 gport, bool enable);

extern int32
sys_usw_port_api_get_mac_auth(uint8 lchip, uint32 gport, bool* enable);

extern int32
sys_usw_port_api_get_interface_mode(uint8 lchip, uint32 gport, ctc_port_if_mode_t* if_mode);

extern int32
sys_usw_port_api_glb_dest_port_init(uint8 lchip, uint16 glb_port_index);

extern int32
sys_usw_port_api_set_glb_dest_port_by_dest_port(uint8 lchip, uint16 lport);

extern int32
sys_usw_port_api_get_port_reflective(uint8 lchip, uint32* p_bmp);

extern int32
sys_usw_port_api_update_mc_linkagg(uint8 lchip, uint16 tid, uint16 lport, bool is_add);

extern int32
sys_usw_port_api_set_global_port(uint8 lchip, uint16 lport, uint32 gport, bool update_mc_linkagg);

extern int32
sys_usw_port_api_get_global_port(uint8 lchip, uint16 lport, uint32* p_gport);

extern int32
sys_usw_port_api_get_local_phy_port(uint8 lchip, uint32 gport, uint32* p_value);

extern int32
sys_usw_port_api_lport_convert(uint8 lchip, uint16 internal_lport, uint16* p_value);

extern int32
sys_usw_port_api_set_isolation_mode(uint8 lchip, uint8 choice_mode);

extern int32
sys_usw_port_api_get_isolation_mode(uint8 lchip, uint8* p_choice_mode);

extern int32
sys_usw_port_api_set_internal_property(uint8 lchip, uint32 gport, uint32 port_prop, uint32 value);

extern int32
sys_usw_port_api_get_internal_property(uint8 lchip, uint32 gport, uint32 port_prop, uint32* p_value);

extern int32
sys_usw_port_api_set_mirror_en(uint8 lchip, uint16 lport, uint8 type, uint32 dsfwd_offset, bool is_add);

extern int32
sys_usw_port_api_set_port_mac(uint8 lchip, uint32 gport, mac_addr_t mac_da);

extern int32
sys_usw_port_api_set_if_status(uint8 lchip, uint16 lport, uint32 value);

extern int32
sys_usw_port_api_set_scl_hash_tcam_priority(uint8 lchip, uint32 gport, uint8 scl_id, uint8 is_tcam, uint8 value);

extern int32
sys_usw_port_api_set_acl_league_property(uint8 lchip, uint8 acl_pri, uint8 enable, uint8 sub_blk_cnt, uint8 *sub_blk_list);

extern int32
sys_usw_port_api_register_rchip_get_gport_idx_cb(uint8 lchip, SYS_PORT_GET_RCHIP_GPORT_IDX_CB cb);

extern int32
sys_usw_port_api_set_default_cfg(uint8 lchip, uint32 gport);

extern int32
sys_usw_port_api_set_internal_direction_property(uint8 lchip, uint32 gport, sys_port_internal_direction_property_t port_prop, ctc_direction_t dir, uint32 value);

extern int32
sys_usw_port_api_get_internal_direction_property(uint8 lchip, uint32 gport, sys_port_internal_direction_property_t port_prop, ctc_direction_t dir, uint32* p_value);

extern int32
sys_usw_port_api_set_property(uint8 lchip, uint32 gport, ctc_port_property_t port_prop, uint32 value);

extern int32
sys_usw_port_api_get_property(uint8 lchip, uint32 gport, ctc_port_property_t port_prop, uint32* p_value);

extern int32
sys_usw_port_api_set_direction_property(uint8 lchip, uint32 gport, ctc_port_direction_property_t port_prop, ctc_direction_t dir, uint32 value);

extern int32
sys_usw_port_api_get_direction_property(uint8 lchip, uint32 gport, ctc_port_direction_property_t port_prop, ctc_direction_t dir, uint32* p_value);

extern int32
sys_usw_port_api_set_phy_mapping(uint8 lchip, ctc_chip_phy_mapping_para_t* phy_mapping_para);

extern int32
sys_usw_port_api_get_phy_mapping(uint8 lchip, ctc_chip_phy_mapping_para_t* phy_mapping_para);

extern int32
sys_usw_port_api_register_phy(uint8 lchip, void* p_register);

extern int32
sys_usw_port_api_set_phy_property(uint8 lchip, uint32 gport, ctc_port_property_t port_prop, void* p_value);

extern int32
sys_usw_port_api_get_phy_property(uint8 lchip, uint32 gport, ctc_port_property_t port_prop, void* p_value);

extern int32
sys_usw_port_api_set_property_ext(uint8 lchip, uint32 gport, ctc_port_property_t port_prop, void* p_value);

extern int32
sys_usw_port_api_get_property_ext(uint8 lchip, uint32 gport, ctc_port_property_t port_prop, void* p_value);

extern int32
sys_usw_port_api_set_interface_mode(uint8 lchip, uint32 gport, ctc_port_if_mode_t* if_mode);

extern int32
sys_usw_port_api_set_serdes_mode(uint8 lchip, ctc_chip_serdes_info_t* p_serdes_info);

extern int32
sys_usw_port_api_set_serdes_property(uint8 lchip, ctc_chip_property_t chip_prop, void* p_value);

extern int32
sys_usw_port_api_get_serdes_property(uint8 lchip, ctc_chip_property_t chip_prop, void* p_value);

extern int32
sys_usw_port_api_set_capability(uint8 lchip, uint32 gport, ctc_port_capability_type_t type, uint32 value);

extern int32
sys_usw_port_api_get_capability(uint8 lchip, uint32 gport, ctc_port_capability_type_t type, void* p_value);

extern int32
sys_usw_port_api_alloc_chan(uint8 lchip, uint32* p_chan_id);

extern int32
sys_usw_port_api_alloc_port(uint8 lchip, uint32* p_lport);

extern int32
sys_usw_port_api_get_misc_chan_info(uint8 lchip, uint8 misc_chan_type, sys_port_api_misc_chan_info_t* p_misc_info);

extern int32
sys_usw_port_api_get_com_info(uint8 lchip, uint16 lport, uint8 index, sys_port_info_t* p_port_info);

extern int32
sys_usw_port_api_get_port_info(uint8 lchip, uint16 lport, sys_port_api_dmps_info_t* p_port_info);

extern int32
sys_usw_port_api_get_dmps_property(uint8 lchip, sys_usw_dmps_port_info_t* p_dmps_port_info, sys_port_api_dmps_property_t dmps_prop, void *p_value);

extern uint16
sys_usw_port_api_get_lport_with_chan(uint8 lchip, uint8 dir, uint16 chan_id);

extern uint16
sys_usw_port_api_get_lport_with_subchan(uint8 lchip, uint8 rx, uint8 core, uint8 pp, uint8 dp, uint8 sub_chan_id);

extern uint16
sys_usw_port_api_get_lport_with_mac(uint8 lchip, uint16 mac_id);

extern int32
sys_usw_port_api_get_sub_chan_by_chan(uint8 lchip, uint8 rx, uint16 chan, uint16* sub_chan, uint8* pp_id, uint8* dp_id);

extern int32
sys_usw_port_api_dmps_db_init(uint8 lchip);

extern int32
sys_usw_port_api_dmps_db_deinit(uint8 lchip);

extern int32
sys_usw_port_api_init(uint8 lchip, ctc_port_global_cfg_t* p_port_global_cfg);

extern int32
sys_usw_port_api_deinit(uint8 lchip);

extern int32
sys_usw_port_api_get_channel(uint8 lchip, uint8 rx, uint32 gport, uint32 *chan, uint8 *chan_num);

extern int32
sys_usw_port_api_get_mac(uint8 lchip, uint8 rx, uint32 gport, uint32 *mac, uint8 *mac_num);

extern int32
sys_usw_port_api_check_datapath_credit_clear(uint8 lchip, uint32 mac_id, uint32 chan_id);

extern int32
sys_usw_port_api_set_other_misc_chan(uint8 lchip, uint16 lport, uint8 port_type, uint8 speed_mode, uint8 dir);

extern int32
sys_usw_port_api_get_internal_chan_start(uint8 lchip, uint8 dp_id, uint16* p_chan_id);

extern void
sys_usw_port_api_dmps_daemon_thread(void* para);

extern int32
sys_usw_port_api_get_mac_stats(uint8 lchip, uint32 block_id, sys_usw_dmps_mac_stats_t* p_mac_stats);

extern int32
sys_usw_port_api_clear_mac_stats(uint8 lchip, uint32 block_id, uint8 dir);

extern int32
sys_usw_port_api_set_logic_port_property(uint8 lchip,uint32 logic_port,ctc_logic_port_property_t logic_port_prop,ctc_direction_t dir,void* p_value);

extern int32
sys_usw_port_api_get_logic_port_property(uint8 lchip,uint32 logic_port,ctc_logic_port_property_t logic_port_prop,ctc_direction_t dir,void* p_value);
extern int32
sys_usw_port_api_get_mac_group_valid(uint8 lchip, uint8 core_id, uint32* p_mac_group_valid);


extern int32
sys_usw_port_api_get_chan_by_info(uint8 lchip, uint8 p_core_id, uint8 p_pp_id, uint8 p_dp_id, uint16 index_in_dp, uint16* p_chan_id);
#ifdef __cplusplus
}
#endif

#endif

